The present invention relates to communication systems, and more specifically to a method and system for setting and adjusting transmission and reception power levels in a communication system.
In today's high-speed communication systems, point-to-point serial links are being used increasingly, in place of traditional shared buses. Point-to-point serial links have advantages over shared buses; for example high availability, lack of collisions, etc., but such serial links are sometimes less desirable in advanced systems with complex architecture. This is because in systems having point-to-point serial links, performance deteriorates when a large number of components are packed onto a chip. Power consumption and data integrity suffer greatly in these situations, posing concerns for overall system performance. The power and reception challenges are closely coupled and have to be addressed cohesively, as will be understood in the following.
Conventionally, transmission and reception power is fixed to each chip at the design stage. This is a good approach for chips coupled to few links. However, as more components are packed into chips, more power is consumed and more interface noise is generated, much of it due to cross coupling (cross talk) between signals carried by closely situated conductors. In order to illustrate some of these concerns and challenges, FIG. 1 provides an example of a network system 10, such as may exist in the prior art.
The prior art network system 10 provided in FIG. 1 has a point-to-point link structure. This network system 10 includes end nodes 11, switches 12, one or more routers 13, sub-net managers 14, and links 20. The network system 10 of FIG. 1 is depicted for illustrative purposes only. Other point-to-point network systems may contain more, less or different components, even though the challenges remain substantially the same.
Any of the links 20 in FIG. 1 represents a full duplex transmission path. A duplex transmission path provides for two-way communication between components that are linked together. Links 20 are provided to connect, directly or indirectly, any two components in network system 10. The components depicted in FIG. 1 may be either nodes or fabric-elements (e.g. end nodes 11, switches 12, router 13, and links 20) of the network system 10. Each node includes one or more ports for communicating over one or more links. FIG. 2 provides a more detailed prior-art illustration of link connections made between ports.
As illustrated In FIG. 2, in a duplex serial communication link 20, port-to-port communication is provided over a pair of one-way links carrying high-speed-low voltage differential signals (LVDS) from a transmitter TX 22 to a receiver RX 23. For example, the transmitter 22 of port A sends a signal to the receiver 23 of port B over a first one-way link of the duplex communication path. Over a second one-way link transmitter 22 of port B sends a signal to the receiver 23 of port A, either at a different time, or simultaneously.
One way of analyzing the performance of such communication system is through an eye diagram of the LVDS bit streams that are sent from a transmitter to receiver therein. An eye diagram can be defined as a time domain data valid window of the generated bit streams transmitted between the driver and the receiver at any one time. The signals transmitted from the transmitter to receiver are subjected to jitter, attenuation and other interference, which affect the ability to receive the data they represent. The greater these sources of interference and attenuation, the smaller the eye of the diagram becomes. Consequently, it becomes very important to address and correct these sources of interference.
One way of increasing the signal-to-noise ratio in such systems is by equalization methods. In general, such methods operate by increasing the emphasis of the system on certain high frequency components of the signal. Some equalization methods involve complex digital signal processing. The implementation of an equalization method, however, is difficult and requires high power consumption. In addition, the equalization method itself may contribute to noise. Equalization methods are therefore undesirable in an environment in which power consumption is already at issue. To complicate the problem further, in a densely packed chip, cross coupling interference (cross-talk) between elements, such as transmitters and receivers, poses a significant challenge. Unless cross coupling interference is addressed specifically, any attempt to improve signal quality, for example, by use of an equalization method, may lead to diminished signal-to-ise ratio.
Signal strength of a driver, the part of the transmitter that drives output signal levels on a signal line, is directly related to the power allocated to the driver. Receiver sensitivity is directly related to the power allocated to the receiver. An increase in the driver power of a transmitter leads to an increase in the signal strength of the transmitted signals. However, such increase can create more cross-talk noise, coupled (i.e. by capacitive and/or inductive coupling) to a receiver that is spatially close to, but not in communication with the particular transmitter. The receiver sensitivity also depends on channel properties, which cannot be neglected. Because the channel length and properties may vary from one link to another link, in an advanced system in which each chip has multiple receiver/driver pairs, a systematic approach is required to find optimum operating power levels.
Consequently, a new method and system are sought to optimize performance, in terms of bit error rate, of a communication system, by optimizing power levels to which a transmitter and a receiver pair of the communication system are set.